PCB Quick Mount - Advanced Package
- Release on:2019-02-25
Face-to-face array packaging is becoming more and more important, especially in the automotive, telecommunications and computer applications, so productivity has become the focus of discussion. The pin pitch is less than 0.4mm, which is 0.5mm. The main problem with fine pitch QFP and TSOP packages is low productivity. However, since the pitch of the planar array package is not small (for example, flip chip less than 200 μm), after reflow soldering, the dmp rate is at least 10 times better than conventional fine pitch technology. Further, compared with the QFP and TSOP packages of the same pitch, considering the automatic alignment during reflow soldering, the mounting accuracy requirements are much lower.
Another advantage, especially for flip chip, is that the footprint of the printed circuit board is greatly reduced. The planar array package also provides better circuit performance.
Therefore, the industry is also moving toward the surface array package. The μBGA with a minimum pitch of 0.5mm and the chip-scale package (CSP) are attracting attention. At least 20 multinational companies are working on this. A series of research on package structure. In the next few years, bare die consumption is expected to increase by 20% per year, with the fastest growth being flip chip, followed by bare wafers on COB (on-board).
It is expected that the consumption of flip chip will increase from 500 million in 1996 to 2.5 billion at the end of the century, while TAB/TCP consumption will be stagnant or even negative. As expected, it was only about 700 million in 1995.
The placement requirements are different, and the placement method is different. These requirements include component pick-and-place capability, placement force, placement accuracy, placement speed, and flux flow. One of the main characteristics to consider when considering placement speed is placement accuracy.
Pick and place
The fewer the placement heads of the placement equipment, the higher the placement accuracy. The accuracy of the positioning axes x, y and θ affects the overall placement accuracy. The placement head is mounted on the support frame of the xy plane of the placement machine. The most important part of the placement head is the rotation axis, but do not ignore the movement accuracy of the z-axis. . In high-performance placement systems, the z-axis motion is controlled by a microprocessor that uses sensors to control vertical travel distance and placement force.
One of the main advantages of placement is that the precision placement head can move freely in the x, y plane, including retrieving from a waffle tray and performing multiple measurements on the device on a fixed up-view camera.
The most advanced placement system can achieve 4 sigma and 20μm accuracy on the x and y axes. The main disadvantage is that the placement speed is low, usually less than 2000 cph, which does not include other auxiliary actions, such as flip chip soldering. Wait.
A simple placement system with only one placement head will soon be eliminated and replaced with a flexible system. In such a system, the support frame is equipped with a high-precision head and a revolver head for mounting large-size BGA and QFP packages. A rotating (or shooter) head can handle irregularly shaped devices, fine pitch flip chips, and μBGA/CSP wafers with pin pitches as small as 0.5 mm. This method of placement is called "collection, picking and placement."
High-performance SMD placement equipment with flip-chip rotating heads has emerged on the market. It is capable of high-speed placement of flip-chips and μBGA and CSP wafers with a 125 μm diameter grid and a pitch of approximately 200 μm. The placement speed for devices with collection, pick-and-place functionality is approximately 5000 cph.
Traditional wafer sniffer
Such systems have a horizontally rotating rotating head while picking up the components from the moving feeder and attaching them to the moving PCB.
In theory, the system can be placed at speeds of up to 40,000 cph with the following limitations:
Wafer picking must not exceed the grid plate placed by the device;
The spring-driven vacuum nozzle does not allow for time optimization during movement on the z-axis, or does not reliably pick up the die from the conveyor;
For most surface array packages, the placement accuracy is not satisfactory, and the typical value is 10μm higher than 4sigma;
Cannot be implemented as a micro flip chip solder.
Collection and placement
In the "collect and place" sniffer system, both swivel heads are mounted on the x-y support. The swivel head is then equipped with 6 or 12 nozzles that can be placed anywhere on the grid plate. For standard SMD wafers, this system achieves 80μm placement accuracy and 20,000pch placement speed at 4sigma (including theta bias). By changing the positioning dynamics of the system and the search algorithm of the ball grid, for the surface array package, the system can achieve placement accuracy of 60μm to 80μm and placement speed of more than 10,000pch under 4sigma.
In order to have a holistic understanding of the different placement equipment, you need to know the main factors that affect the placement accuracy of the surface array package. The ball grid mounting accuracy P//ACC// depends on the type of ball grid alloy, the number of ball grids, and the weight of the package.
These three factors are interrelated, and most of the planar array packages require less placement accuracy than ICs with the same pitch QFP and SOP packages.
Note: Insert the equation
For a shingle without a solder mask, the maximum allowable placement deviation is equal to the radius of the PCB pad. When the placement error exceeds the PCB pad radius, the ball grid and the PCB pad still have mechanical contact. Assuming that the usual PCB pad diameter is approximately equal to the diameter of the ball grid, the mounting accuracy of the μBGA and CSP packages with a ball grid diameter of 0.3 mm and a pitch of 0.5 mm is required to be 0.15 mm; if the ball grid diameter is 100 μm and the pitch is 175 μm , the accuracy requirement is 50μm.
In the case of strip ball grid array package (TBGA) and heavy ceramic ball grid array package (CBGA), self-alignment is limited even if it occurs. Therefore, the accuracy of placement is high.
The standard large-scale reflow soldering of flip chip ball grids requires flux for the furnace. Today's more powerful general-purpose SMD placement equipment comes with built-in flux applications, and two common built-in supply methods are coating and dip soldering.
The coating unit is mounted near the placement head. Apply flux to the placement location prior to flip chip placement. The dose applied at the center of the placement location depends on the size of the flip chip and the wetting characteristics of the flux on a particular material. It should be ensured that the flux coating area is large enough to avoid leakage of the pad due to errors.
In order to perform effective filling in a no-clean process, the flux must be a non-clean (no residue) material. Liquid fluxes rarely contain solid materials and are best suited for use in no-clean processes.
However, due to the fluidity of the liquid flux, the movement of the tape of the placement system can cause inertial displacement of the wafer after flip chip mounting. There are two ways to solve this problem:
Set a waiting time of a few seconds before the PCB is transferred. During this time, the flux around the flip chip rapidly evaporates to improve adhesion, but this reduces yield.
You can adjust the acceleration and deceleration of the belt to match the adhesion of the flux. Smooth movement of the belt does not cause wafer displacement.
The main disadvantage of the flux coating method is that its period is relatively long, and the mounting time is increased by about 1.5 s for each device to be coated.
Dip welding method
In this case, the flux carrier is a rotating barrel and is scraped into a flux film (about 50 μm) with a blade. This method is suitable for high-viscosity fluxes. By simply soldering the flux at the bottom of the ball grid, flux consumption can be reduced during the process.
This method can take the following two process sequences:
Placement after the optical ball grid alignment and ball grid dipping flux. In this sequence, the mechanical contact of the flip chip ball grid and the flux carrier can have a negative impact on placement accuracy.
After the ball grid dipping flux and the optical ball grid are aligned, the mounting is performed. In this case, the flux material affects the image of the optical ball grid alignment.
The dip soldering method is not well suited for fluxes with high volatility, but it is much faster than the coating method. Depending on the placement method, the time attached to each device is approximately: pure pick-up, placement is 0.8s, collection, placement is 0.3s.
When using a standard SMT to mount a μBGA or CSP with a 0.5mm pitch, there are some things to note: For applications that use hybrid technology (standard SMD with μBGA/CSP), the most critical process is flux. Coating printing. Logically, it is also possible to use a combination of conventional flip chip process and solder application methods.
All surface array packages show potential for performance, package density and cost savings. In order to play a role in the overall field of electronic production, further research and development is needed to improve processes, materials and equipment. In terms of SMD placement equipment, a lot of work is focused on vision technology, higher throughput and accuracy.
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