How to meet the EMC requirements as much as possible without causing too much cost pressure?
o-leading.com
o-leading.com
2017-09-29 20:51:58
PCB board will increase the cost due to EMC, usually because of increasing the number of strata to enhance the shielding effect and increase the ferrite, bead, choke and other high-frequency harmonic suppression device reasons. In addition, it is usually necessary to match the shielding structure of other organizations to make the whole system pass the requirements of EMC. Below are the design techniques for the PCB board to provide several electromagnetic radiation effects to reduce the circuit.
Choose the rate (slew) device as much as possible to reduce the high frequency components generated by the signal.
Pay attention to the placement of high frequency devices, not too close to external connectors.
Note the impedance matching of the high-speed signal, the return current path and the routing layer to reduce the reflection and radiation of the high frequency.
Sufficient and proper decoupling capacitors are placed at the power pins of each device to mitigate noise on the power layer and on the ground. Particular attention should be paid to the frequency response of the capacitor and to the characteristics of the temperature that conform to the design requirements.
The ground near the external connector can be properly segmented with the ground and the connector ground is adjacent to the chassis ground.
Appropriate use of ground, guard/shunt, traces, in some special high-speed signal next to. Attention should be paid to the influence of the guard/shunt traces on the line impedance.
The power layer is 20H lower than the formation, and H is the distance between the power layer and the formation.
Choose the rate (slew) device as much as possible to reduce the high frequency components generated by the signal.
Pay attention to the placement of high frequency devices, not too close to external connectors.
Note the impedance matching of the high-speed signal, the return current path and the routing layer to reduce the reflection and radiation of the high frequency.
Sufficient and proper decoupling capacitors are placed at the power pins of each device to mitigate noise on the power layer and on the ground. Particular attention should be paid to the frequency response of the capacitor and to the characteristics of the temperature that conform to the design requirements.
The ground near the external connector can be properly segmented with the ground and the connector ground is adjacent to the chassis ground.
Appropriate use of ground, guard/shunt, traces, in some special high-speed signal next to. Attention should be paid to the influence of the guard/shunt traces on the line impedance.
The power layer is 20H lower than the formation, and H is the distance between the power layer and the formation.