PCB design tips: power plane processing
1. When doing power processing, the first thing to consider is its current carrying capacity, which includes two aspects.
(a) Whether the power line width or the width of the copper is sufficient. To consider the power line width, first understand the copper thickness of the layer where the power signal is processed. Under the conventional process, the copper thickness of the PCB outer layer (TOP/BOTTOM layer) is 1OZ (35um), and the inner copper thickness will be made according to the actual situation. 1OZ or 0.5OZ. For 1OZ copper thickness, under normal circumstances, 20mil can carry about 1A current; 0.5OZ copper thickness, under normal circumstances, 40mil can carry about 1A current.
(b) Whether the size and number of holes in the layer change meets the current flow capability of the power supply. First of all, we must understand the flow capacity of a single via. Under normal conditions, the temperature rise is 10 degrees. Refer to the table below.
Through hole aperture and power flow capacity comparison table
As can be seen from the above table, a single 10 mil via can carry a current of 1 A, so if the power supply is 2 A current when designing, use a 10 mil via to punch at least two vias. . Generally, when designing, consider making a few holes on the power channel to keep a little margin.
2. Secondly, the power path should be considered. The following two aspects should be considered.
(a) The power path should be as short as possible. If it is too long, the voltage drop of the power supply will be severe. If the voltage drop is too large, the project will fail.
(b) The power plane is divided as much as possible, and slender and dumbbell-shaped segments are not allowed.
(c) When dividing the power supply, the distance between the power supply and the power plane should be kept as close as possible to 20 mil. If the distance is 10 mils in the BGA area, if the power plane is too close to the plane, there is a risk of short circuit.
(d) If the power supply is treated in an adjacent plane, it is necessary to avoid the copper skin or the parallel processing of the traces. Mainly to reduce the interference between different power sources, especially between some power sources with large voltage differences, the overlap of the power plane must be avoided, and it is difficult to avoid the middle interval.
When doing power splitting, try to avoid the cross-segmentation of adjacent signal lines. When the signal is cross-segmented (the red signal line has a cross-segmentation phenomenon as shown below), the impedance of the reference plane will be discontinuous, resulting in EMI and crosstalk. When doing high-speed design, cross-segmentation will have a great impact on signal quality.